1. Field of the Invention
This disclosure relates in general to data signal detection in a data channel, and more particularly to an apparatus for providing dynamic equalizer optimization.
2. Description of Related Art
As computer hardware and software technology continues to progress, the need for larger and faster mass storage devices for storing computer software and data continues to increase. Electronic databases and computer applications such as multimedia applications require large amounts of disk storage space.
Mass storage device manufacturers strive to produce high-speed hard disk drives with large data capacities at lower and lower costs. A high-speed hard disk drive is one that can store and retrieve data at a fast rate. One aspect of increasing disk drive speed and capacity is to improve or increase the areal density. Areal density may be increased by improving the method of storing and retrieving data.
In general, mass storage devices and systems, such as hard disk drives, include a magnetic storage media, such as rotating disks or platters, a spindle motor, read/write heads, an actuator, a pre-amplifier, a read channel, a write channel, a servo controller or digital signal processor, and control circuitry to control the operation of the hard disk drive and to properly interface the hard disk drive to a host or system bus. The read channel, write channel, servo controller, and a memory may all be implemented as one integrated circuit that is referred to as a data channel. The control circuitry often includes a microprocessor for executing control programs or instructions during the operation of the hard disk drive.
A hard disk drive performs write and read operations when storing and retrieving data. A typical hard disk drive performs a write operation by transferring data from a host interface to its control circuitry. The control circuitry then stores the data in a local dynamic random access memory. A control circuitry processor schedules a series of events to allow the information to be transferred to the disk platters through a write channel. The control circuitry moves the read/write heads to the appropriate track and locates the appropriate sector of the track. Finally, the hard disk drive control circuitry transfers the data from the dynamic random access memory to the located sector of the disk platter through the write channel. A sector generally has a fixed data storage allocation, typically 512 bytes of user data. A write clock controls the timing of a write operation in the write channel. The write channel may encode the data so that the data can be more reliably retrieved later.
In a read operation, the appropriate sector to be read is located by properly positioning the read head and data that has been previously written to the disk is read. The read/write head senses the changes in the magnetic flux of the disk platter and generates a corresponding analog read signal. The read channel receives the analog read signal, conditions the signal, and detects “zeros” and “ones” from the signal. The read channel conditions the signal by amplifying the signal to an appropriate level using automatic gain control (AGC) techniques. The read channel then filters the signal, to eliminate unwanted high frequency noise, equalizes the channel, detects “zeros” and “ones” from the signal, and formats the binary data for the control circuitry. The binary or digital data is then transferred from the read channel and is stored in the DRAM of the control circuitry. The processor then communicates to the host that data is ready to be transferred. A read clock controls the timing of a read operation in the read channel.
As the disk platters are moving, the read/write heads must align or stay on a particular track. This is accomplished by reading auxiliary information from the disk called a servo wedge. The servo wedge indicates the position of the heads both in a radial direction and along the circumference of a track. The data channel receives this position information so the servo controller can continue to properly position the heads on the track.
Traditional hard disk drive data or read channels used a technique known as peak detection for extracting or detecting digital information from the analog information stored on the magnetic media. In this technique, the waveform is level detected and if the waveform level is above a threshold during a sampling window, the data is considered a “one.” More recently, advanced techniques utilizing discrete time signal processing to reconstruct the original data written to the disk are being used in read channel electronics to improve areal density. In these techniques, the data is synchronously sampled using a data recovery clock. The sample is then processed through a series of mathematical operations using signal-processing theory.
There are several types of synchronously sampled data channels. Partial response, maximum likelihood (PRML); extended PRML (EPRML); enhanced, extended PRML (EEPRML); fixed delay tree search (FDTS); and decision feedback equalization (DFE) are several examples of different types of synchronously sampled data channels using discrete time signal processing techniques. The maximum likelihood detection performed in many of these systems is usually performed by a Viterbi detector implementing the Viterbi algorithm.
The synchronously sampled data channel or read channel generally requires mixed-mode circuitry for performing a read operation. The circuitry may perform such functions as analog signal amplification, automatic gain control (AGC), continuous time filtering, signal sampling, discrete time signal processing manipulation, timing recovery, signal detection, and formatting. In all synchronously sampled data channels, the major goal during a read operation is to accurately retrieve the data with the lowest bit error rate in the highest noise environment.
One of the fundamental effects that limit the recording density in magnetic and optical recording systems is intersymbol interference (ISI). This effect is due to the bandlimited nature of the head/media combination and results in the overlap of responses due to sequentially recorded transitions on the media. That is, at a given instant in time, the output signal from the medium is composed of not only the response due to the input symbol at that instant, but also the responses from some previously recorded symbols. The amount and the span of this overlap increases as the linear recording density is increased, giving rise to overlap patterns among symbols that are generally very complex and difficult to unravel with a simple device.
Finite impulse response filtering may be used for equalizing received signals. For example, in order to reduce the intersymbol interference introduced by a communication channel, rather precise equalization may be provided using an adaptive filter. However, adaptive filters may also be used for noise cancellation, linear prediction, adaptive signal enhancement, and adaptive control.
Adaptive filters are digital filters that are capable of self-adjustment; and which are used in applications that require differing filter characteristics in response to variable signal conditions. An adaptive filter has the ability to update its coefficients. Coefficients to the adaptive filter are updated by sending new coefficients to the filter from a coefficient generator. The coefficient generator is an adaptive algorithm that modifies the coefficients in response to an incoming signal.
An important aspect of equalizer performance is its convergence. After any initial training period, the coefficients of an adaptive equalizer may be continually adjusted in a decision directed manner according to a suitable algorithm. In this mode, the error signal is derived from the final receiver estimate (not necessarily correct) of the transmitted sequence. In normal operation, the receiver decisions are correct with high probability, so that the error estimates are correct often enough to allow the adaptive equalizer to maintain precise equalization. Moreover, a decision directed adaptive equalizer can track slow variations in the channel characteristics or linear perturbations in the receiver front end, such as slow jitter in the sampler phase.
Thus, a suitable algorithm must be used for determining good equalizer taps describing the finite impulse response filter. A direct method for solving this problem is to write a known pattern to the disk, read the pattern back, deconvolve out the written pattern to obtain the system response, and then directly solve the resulting system of equations for the equalizer taps. This approach requires first writing a known pattern to the disk.
Another (well) known solution is the LMS (Least Mean Square) algorithm. The least mean square (LMS) error adaptive filtering scheme is described in B. Widrow and M. E. Hoff, Jr., “Adaptive Switching Circuits” in IRE Wescon Conv. Rec., Part 4, pp. 96–104, August 1960. The use of the LMS algorithm in an adaptive equalizer to reduce intersymbol interference is discussed in S. U. H. Qureshi, “Adaptive Equalization”, Proc. IEEE, Vol. 73, No. 9, pp. 1349–1387, September 1987.
In an LMS equalizer, the equalizer filter coefficients are chosen to minimize the mean square error, i.e., the sum of squares of all the ISI terms plus the noise power at the output of the equalizer. Therefore, the LMS equalizer maximizes the signal-to-distortion ratio at its output within the constraints of the equalizer time span and the delay through the equalizer. Before regular data transmission begins, automatic synthesis of the LMS equalizer for unknown channels may be carried out during a training period. This generally involves the iterative solution of a set of simultaneous equations. During the training period, a known signal is transmitted and a synchronized version of the signal is generated in the receiver to acquire information about the channel characteristics. The training signal may consist of periodic isolated pulses or a continuous sequence with a broad, uniform spectrum such as a widely known maximum length shift register or pseudo-noise sequence. However, the convergence speed for the LMS equalizer is relatively low, and bandwidth will be consumed for the training sequence. Further, the LMS solution does not converge to the same solution as the direct method.
It can be seen then that there is a need for an apparatus for providing dynamic equalizer optimization.